1. Field of the Invention
The present invention relates to a method for growing a silicon single crystal and a silicon wafer, and particularly relates to a method for growing a silicon single crystal which enables the growth of a silicon single crystal including a dislocation cluster defect occurrence region having a low density of LPD (Light Point Defect) of 0.09 μm or greater.
This application claims priority from Japanese Patent Application No. 2005-234034 filed on Aug. 12, 2005, the content of which is incorporated herein by reference.
2. Background Art
As a method for manufacturing a silicon single crystal which is a starting material of a silicon wafer, a growing method in accordance with the Czochralski method (hereafter, referred to as “CZ method”) is known.
It is known that minute defects which become exposed in a device manufacturing process, i.e., a grown-in defect is generated in the silicon single crystal manufactured using the CZ method. FIG. 1 is a cross sectional view for explaining the radial defect distribution state of the silicon single crystal obtained using the CZ method. As shown in FIG. 1, the grown-in defects of the silicon single crystal obtained using the CZ method includes vacancy defects of which sizes are approximately 0.1 to 0.2 μm, such as laser scattering tomography defects or COP (Crystal Originated Particle) and minute dislocation of which sizes are approximately 10 μm such as dislocation cluster defects.
Moreover, in the silicon single crystal shown in FIG. 1, oxygen induced stacking faults (hereafter, referred to as OSF) distribute like a ring in a region of approximately ⅔ of the external diameter. There is a region (laser scattering tomography defect occurrence region) where approximately 105 to 106/cm3 of the laser scattering tomography defects are detected inside the OSF occurrence region where the OSFs are generated, and there is a region (dislocation cluster defect occurrence region) where approximately 103 to 104/cm3 of the dislocation cluster defects exist outside the OSF occurrence region.
FIG. 2 is a drawing for explaining the defect distribution state on the cross section of a silicon single crystal grown by gradually decreasing the pull rate during its growth. Here, FIG. 1 is a cross sectional view of the silicon single crystal grown at a pull rate equivalent to the position A in FIG. 2.
As shown in FIG. 2, a ring-forming OSF occurrence region appears around the periphery of the crystal in the stage at a faster pull rate, and the inside portion of the OSF occurrence region becomes an laser scattering tomography defect occurrence region where many laser scattering tomography defects are generated. Decreasing the pull rate, the diameter of the OSF occurrence region becomes smaller and a dislocation cluster defect occurrence region where dislocation cluster defects are generated appears at the outside portion of the OSF occurrence region, and then, the OSF occurrence region disappears and the dislocation cluster defect occurrence region appears on the entire surface.
Moreover, an oxygen precipitation promoted region (PV region) where oxygen precipitates (BMD: Bulk Micro Defect) may be formed exists outside the ring-forming OSF occurrence region and making contact with the ring-forming OSF occurrence region, and an oxygen precipitation inhibited region (PI region) where no oxygen precipitation is generated exists between the oxygen precipitation promoted region and the dislocation cluster defect occurrence region. The oxygen precipitation promoted region (PV region), the oxygen precipitation inhibited region (PI regoion) and the ring-forming OSF occurrence region are all defect-free regions where the grown-in defects are extremely low.
As a hot zone structure for growing a silicon single crystal using the CZ method, for example, a hot zone structure where a temperature gradient at the center of the crystal (Gc) is the same or greater than a temperature gradient at the outer circumferential portion of the crystal (Ge) (Gc≧Ge) is proposed (for example, Patent Document 1). FIG. 3 is a drawing for explaining another defect distribution state of the cross section of a silicon single crystal grown by gradually decreasing pull rate during its growth using an apparatus for growing a single crystal having the hot zone structure where the temperature gradient at the center of the crystal (Gc) is the same or greater than a temperature gradient at the outer circumferential portion of the crystal (Ge) (Gc≧Ge).
As shown in FIG. 3, when a silicon single crystal is grown at the pull rate within a range from B to C shown in FIG. 3 using an apparatus for growing a single crystal having a hot zone structure which satisfies Gc≧Ge, a temperature gradient G on the crystal side at or in the vicinity of a solid-liquid interface is controlled and a silicon single crystal of which radial cross section is uniform defect-free region throughout the entire thereof can be obtained.
In addition, in Patent Document 1, technology to increase a pull rate margin of a defect-free crystal by adding hydrogen into a growth furnace using an apparatus for growing a single crystal having the hot zone structure which satisfies Gc≧Ge is proposed. FIG. 4 is a drawing for explaining another defect distribution state of the cross section of a silicon single crystal, grown by supplying an inert gas where hydrogen is added to a growth furnace and by gradually decreasing the pull rate during its growth, using an apparatus for growing a single crystal having a hot zone structure (wherein Gc≧Ge), which is the same as that in FIG. 3. In the case in which an ambient gas where a single crystal is grown is a mixed gas of an inert gas and hydrogen gas, the generation of COP and dislocation cluster defects can be inhibited. Therefore, in comparison with the example shown in FIG. 3 where no hydrogen is added to the growth furnace, as shown in FIG. 4, a critical pull rate for the pull rate range (the range from B to C in FIG. 3 and the range from D to E in FIG. 4) at which a defect-free crystal can be grown may be made faster.
In accordance with the technology described in Patent Document 1, a silcon single crystal where no COP or dislocation cluster defect exists may be grown, and a silicon wafer manufactured from this silicon single crystal may be used as a high-quality prime wafer. However, if the pull rate range is deviated even slighltly, there is the inconvenience that COP and/or dislocation cluster defects are generated. In particular, a wafer where the dislocation cluster defects have been generated deteriorates the electrical properties of a device; thereby, it cannot be used as a prime wafer. However, a silicon single crystal where the dislocation cluster defects are detected may be used, for example, as a material for a LPD monitoring wafer to monitor an LPD size of 0.11 μm or greater.
However, in accordance with the recent miniaturization of integrated circuits, the LPD size to be monitored has become smaller. Specifically, for example, the LPD size to be monitored becomes smaller, less than 0.11 μm. Consequently, miniaturization technology for the dislocation cluster defect size in a wafer is required. Moreover, since the LPD monitoring wafer is repeatedly used, a wafer where the LPD density does not increase after repetitive cleaning is in demand.
However, a conventional LPD monitoring wafer sometimes cannot accurately monitor because a density of LPD having a size of greater than that to be monitored is high on the wafer surface, or the density of LPD having a size of greater than that to be monitored is drastically increased by SC-1 of the surface.
The present invention considers the above circumstances, and has the objective of providing a method for growing a silicon single crystal where a silicon single crystal containing a dislocation cluster defect occurrence region and having a low density of LPD of 0.09 μm or greater can be grown.
Moreover, the present invention aims to provide a silicon wafer that is sampled from a straight body section of the silicon single crystal grown using the method for growing a silicon single crystal, and that can be suitably used for a high-accuracy LPD monitoring wafer.
(Patent Document 1) International Patent Publication No. WO02004/083496